1. Field of the Invention
The present invention relates to a semiconductor element-housing package for mounting a semiconductor element.
2. Description of the Related Art
Conventional semiconductor element-housing packages for mounting semiconductor elements are constructed of an insulating substrate which is composed of a plurality of insulating layers of an electrically insulating material such as sintered aluminum oxide, for example, and which has a mounting portion for mounting a semiconductor element in the center of a top surface thereof; a plurality of metallized wiring layers which lead out from the periphery of the semiconductor element-mounting portion of the insulating substrate to the outer circumference of the top surface of the insulating substrate, and have sections located along the periphery of the semiconductor element-mounting portion to form bonding pads (ground bonding pads, power-supply bonding pads and signal bonding pads) for electrical connections to respective electrodes of the semiconductor element (a ground electrode, power-supply electrode and signal electrode); outer lead pins which are attached, via a brazing material such as brazing silver, to the sections of the metallized wiring layers which have been led to the outer circumference of the top surface of the insulating substrate; and a lid constructed of a metal such as an iron-nickel-cobalt alloy or a ceramic material such as sintered aluminum oxide; a semiconductor device is fabricated as a product by securely bonding the semiconductor element to the semiconductor element-mounting section of the insulating substrate via an adhesive such as a brazing material, resin, glass or the like, electrically connecting the respective electrodes (a ground electrode, power-supply electrode and signal electrode) of the semiconductor element to the counterpart bonding pads (ground bonding pads, power-supply bonding pads and signal bonding pads) via bonding wires, and then bonding the lid to the top surface of the insulating substrate via a sealing material such as solder, a resin, glass or the like to the top surface of the insulating substrate to hermetically seal the semiconductor element inside the container constructed of the insulating substrate and the lid.
Attached to the semiconductor element-housing package is a connecting conductor which is led from the ground bonding pad for an electrical connection to the ground electrode of the semiconductor device, and the power-supply bonding pad for an electrical connection to the power-supply electrode, of the bonding pads mentioned above, to the underside of the insulating substrate, the sections of which led to the underside of the insulating substrate form capacitor-connecting pads for connections to electrodes of a chip capacitor, wherein the chip capacitor is attached to the capacitor-connecting pad via a bonding material such as solder so as to electrically connect the respective electrodes of the chip capacitor to the connecting conductor.
The chip capacitor which is attached to the capacitor-connecting pad functions as a decoupling capacitor to reduce power-supply noise caused by change in electric potential between the ground voltage and the power-supply voltage which are supplied to the semiconductor element; the chip capacitor is designed to ensure normal operation of the semiconductor element by supplying a charge proportional to the change in electric potential between the ground voltage and the power-supply voltage to the ground bonding pad and the power-supply bonding pad which are connected to the ground electrode and the power-supply electrode of the semiconductor element to reduce power-supply noise caused by change in electric potential between the ground voltage and the power-supply voltage.
The chip capacitor, however, has a drawback in that when it is attached to the underside of the insulating substrate, the connecting conductor for establishing electrical connections from the ground bonding pad and the power-supply bonding pad to the capacitor-connecting pad has an increased horizontal length and a large inductance, and this large inductance of the connecting conductor greatly impairs the function of the chip capacitor as a decoupling capacitor, thus preventing full-scale production of the power-supply noise reduction effect of the chip capacitor.
In order to overcome this drawback, it may be advisable to have a plurality of pairs of a ground plane and a power plane placed opposing each other and sandwiching part of the insulating layers which form the insulating substrate, in the insulating substrate to thereby store capacitance between the paired ground planes and power planes, and to establish electrical connections between the ground bonding pad which is electrically connected to the ground electrode of the semiconductor element, and the ground planes, and between the power-supply bonding pad which is electrically connected to the power-supply electrode of the semiconductor element, and the power-supply planes, at the periphery of the semiconductor element-mounting portion, to thereby provide the capacitance as decoupling capacitors.
Here, it is possible to shorten the wires for the electrical connections between the ground planes and the power-supply planes, and the ground bonding pad which is electrically connected to the ground electrode of the semiconductor element, and the power-supply bonding pad which is electrically connected to the power-supply electrode of the semiconductor element, respectively with the result of a small inductance, and eventually to reduce influence of the inductance of the connecting conductor on the noise-reducing effect of the decoupling capacitors.
However, since the specific dielectric constant of the sintered aluminum oxide which composes the insulating substrates of semiconductor element-housing packages is as low as approximately 7, it becomes necessary to have a great number of pairs of ground planes and power-supply planes placed opposing each other and sandwiching part of the insulating layers which form the insulating substrate, or to have vast opposing areas of the paired ground planes and power-supply planes, in order to store sufficiently increased capacitance between the paired ground planes and power-supply planes as decoupling capacitors, and this creates the drawback that extremely thick, large and heavy packages are required for housing a semiconductor element.